The invention relates to the field of Field Programmable Gate Arrays (FPGAs).
Microprocessors such as the PowerPC and x86 lines have been the traditional work-horses of computing systems over the years. While they offer post-fabrication flexibility through software programmability, the demand for on-board autonomy-enabling applications has pushed the envelope of computation complexity far beyond the reach of these processors. Application-Specific Integrated Circuits (ASICs), while being capable of meeting the computation demands of these algorithms, incur very high NRE (non-recurring engineering) costs and offer little to no flexibility for algorithmic changes in the post-deployment/fabrication phase. FPGAs are gaining increasingly strong support in the computing community as the platform of choice for applications, because they offer the best of both ASIC and microprocessor worlds. Today's state-of-the-art FPGAs have low cost, high capability and nearly-zero NRE. FPGA-based designs can be deployed as-is or converted to a low-cost structured ASIC.
The foregoing examples of the related art and limitations related therewith are intended to be illustrative and not exclusive. Other limitations of the related art will become apparent to those of skill in the art upon a reading of the specification and a study of the figures.